1. Field of the Invention
The present invention relates to a BiCMOS negative charge pump, particularly for integration in non-volatile memory device chips.
2. Discussion of the Related Art
Non-volatile memory devices require, for the operation of electrical erasure of the memory cells, provision of on-chip negative charge pumps capable of generating a negative voltage starting from a voltage between ground and the positive voltage supply (VDD).
A known circuit structure of a negative charge pump in CMOS technology is depicted in FIG. 1. The circuit includes a plurality of stages S1-S4 connected in series between ground and an output O of the charge pump. Each stage includes a P-channel pass-transistor M1, a P-channel pre-charge transistor M2 and two capacitors CP and CL. Capacitor CP has a plate driven by one of two phase signals A or C, capacitor CL has a plate driven by a respective phase signal B or D. The simplified timing of the phase signals A, B, C and D is depicted in FIG. 2. All the phase signals are digital signals varying between ground and a positive voltage supply, typically the voltage supply VDD of the chip wherein the charge pump is integrated. Phase signals A and D are substantially in phase with respect to each other and are substantially in phase opposition with respect to signals B and C.
When the charge pump is integrated in a non-volatile memory device chip, P-channel transistors M1, M2 are formed inside respective N type wells formed in a P type semiconductor substrate.
A positive charge flows from the output terminal O of the charge pump toward ground, and nodes P1, P2, P3, P4 acquire negative potentials. Considering one of the stages, for example stage S2, when the respective phase signal C switches from VDD to ground the pass-transistor M1 turns on. At the same time, the pass-transistors M1 in the adjacent stages are turned off by the switching of phase signal A from ground to VDD. A positive charge flows from capacitor CL of stage S2 to capacitor CL of stage S1.
In an ideal negative charge pump, the voltage at the output P1-P4 of a given stage is one VDD lower than the voltage at the output of the preceding stage (moving from left to right in FIG. 1); the higher the number of stages, the higher (in absolute value) the voltage at the output node O.
In the practice, however, since the P-channel pass-transistors M1 can have a rather high threshold voltage VTH due to the body effect, the voltage gain of each stage is limited to a value lower than -VDD.
The body effect is especially pronounced in the stages near the output terminal O of the charge pump, wherein the drain and the source electrodes of the P-channel pass-transistors M1 can be at potentials of approximately -10 V.
In order to eliminate the problems of body effect, it would be necessary to bias the N type well, wherein the P-channel pass-transistors M1 are formed, at negative voltages. However, this is not possible, because the N type well/P type substrate junction would be forward biased.
The provision of pre-charge transistors M2 and of the capacitors CP partially reduces the body effect problem, because the gate electrodes of the pass-transistors M1 are boosted to obtain gate-to-source drive voltages higher in absolute value. To this purpose, proper temporal spacing between phase signals A, B, C and D is necessary, so that precharging of the gate electrode of the pass transistors M1 takes place at different time intervals with respect to the transfer of charge from one stage to another. However, boosting of the gate electrodes of the pass-transistors is not useful after a given number of stages.
The reduced efficiency of each stage makes it necessary to provide a greater number of stages (which are less and less efficient), and the chip area occupied and the power consumption increase. Additionally, after a given number of stages, the gain of the subsequent stages becomes zero.
Another possibility calls for increasing the voltage swing of phase signals A and C (which drive capacitors CP), which instead of varying between ground and VDD should vary between ground and, e.g., 2 VDD. This solution complicates the design, because it would be necessary to provide a positive charge pump for generating the phase signals.
In view of the state of the art described, it is an object of the present invention to provide a negative charge pump which is capable of reducing or eliminating the problems related to the body effect of the pass-transistors.